DS200TCDAG2BBA - Digital I/O Board

DS200TCDAG2BBA - Digital I/O Board DS200TCDAG2BBA - Digital I/O Board

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SPECIFICATIONS

Part Number: DS200TCDAG2BBA
Manufacturer: General Electric
Series: Mark V
Product Type: Digital I/O Board
Operating Temperature: 0 to 60oC (32 to 149 oF)
Availability: In Stock
Country of Manufacturer: United States (USA)

Functional Description

DS200TCDAG2BBA is a Digital I/O Board developed by General Electric. It is a part of Mark V system. Designed to process digital contact input signals and contact output (relay/solenoid) signals. The Digital I/O Board (TCDA) is located in the digital I/O cores Q11, Q51, and Q21 (if present). Its primary function is to receive digital contact input signals from the DTBA and DTBB terminal boards. Transmit contact output (relay/solenoid) signals to the TCRA boards. Communicate signals over IONET to the TCQC board in R1 and R2 (if Q21 is installed) and the CTBA terminal board in R5.

Connectors and Their Functions

  • JP - Distributes power from the TCPS board in R1, R2, and R5 cores to the Q11, Q21, and Q51 cores respectively.
  • JQ - Connects to the JQR socket on the DTBA board to carry digital contact input signals to the TCDA board.
  • JR - Connects to the JRR socket on the DTBB board to carry digital contact input signals to the TCDA board.
  • JO1 - Sends contact output (relay/solenoid) signals to the TCRA board in location four. Not used in Q11, as relays in location four are directly controlled by TCQE in R1.
  • JO2 - Sends contact output (relay/solenoid) signals to the TCRA board in location five.
  • JX1 - A shielded twisted pair connector for IONET signals.
    • The board in Q11 sends signals to the JX2 connection on the TCEA board in location five of the P1 core.
    • The board in Q51 sends signals to the JX connection on the CTBA terminal board in the R5 core.
  • JX2 - Used interchangeably with JX1 for the same function.

Hardware Configuration

The board includes eight hardware jumpers for configuration:

  • J1 and J8 - Factory test settings.
  • J2 and J3 - IONET termination resistors.
  • J4, J5, and J6 - Used to set the IONET ID for the board.
  • J7 - Stall timer enable setting.

 

TCDA Contact Input Circuits

  • The board receives contact input signals from the DTBA and DTBB terminal boards through the JR and JQ connectors.
  • These signals are conditioned, time-tagged, and sent to IONET via JX1 or JX2.
  • Software inversion of contact signals is done using I/O configuration constants. 

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FREQUENTLY ASKED QUESTIONS

What is DS200TCDAG2BBA?
It is a Digital I/O Board developed by General Electrics.

Where is TCDA located?
The board is located in the digital I/O cores Q11, Q51, and Q21 (if present) of the Mark V control system.

How is the TCDA configured?
It has eight jumpers for IONET ID, termination resistors, and stall timer enable settings.
Jumpers J1 and J8 are for factory testing. I/O configuration constants are used to manage contact input signal inversion via the HMI.

What is the role of the JX1 and JX2 connectors?
Both JX1 and JX2 serve as IONET signal transmission connectors. Either one can be used to send signals to TCEA (P1 core) or CTBA (R5 core).