DS215SLCCG1AZZ01B - LAN Communications Card

DS215SLCCG1AZZ01B - LAN Communications Card DS215SLCCG1AZZ01B - LAN Communications Card

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Part Number: DS215SLCCG1AZZ01B
Manufacturer: General Electric
Series: EX2000
Number of relay channels: 12
Product Type: LAN Communications Card
Operating System: QNX
Power supply voltage: 24 V dc
Mounting: DIN-rail mounting
Technology: Surface mount
Operating temperature: 40 to 70 degrees Celsius
Size: 17.8 cm high x 33.02 cm
Repair: 3-7 Day
Availability: In Stock
Country of Manufacturer: United States (USA)
Manual: GEI-100162B

Functional Description

DS215SLCCG1AZZ01B is a LAN Communications Card developed by GE. It is a part of Mark V control system. It has circuits for communications with the drive or exciter that are both isolated and non-isolated. The programmer module is connected to the 16-position alphanumeric display (and display controller, U18). The KPPL connector receives the programmer module, which is mounted to the SLCC. The LAN Control Processor, U1, is the main microprocessor (LCP). Two replaceable EPROMs contain the LCP software (U6 and U7). U8 and U9 supply the LCP-specific Memory. Communication between the LCP and the Drive Control Processor (DCP) on the Drive Control Card occurs via 3PL and dual-ported RAM (U5). Dual-ported RAM [DPR] is RAM set up as memory arrays that two microprocessors may access both independently and concurrently. Mark V improves unit reliability even further by employing three redundant control processors. This triple modular redundant (TMR) design can safely operate, control, and protect a unit in the event that one of its control processors or control processor components fails. The TMR design allows for the shutdown and repair of a single control processor without shutting down the turbine.

Card Connections

Five connectors (marked _PL) connect the SLCC to the other controller boards, external signals, and the network. These are the connectors to other boards:

  • 2PL - ±5, 15, and 24 V dc I/O between the Power Supply/Interface Board (IMCP, DCI, SDCI, or DCFB), Drive Terminal Board (531X305NTBA) or
  • Simple Drive Terminal Board (DS200STBA), Drive Control Card and the SLCC
  • 3PL - SLCC inputs from the Drive Control Card
  • 10PL - I/O between the LAN I/O Terminal Board and the SLCC
  • ARCPL - I/O between DLAN and ARCNET signals and the Card
  • KPPL - I/O between the Programmer Module keypad and the Card

Board Mounting

  • Four standoffs on the SDCC are where the SLCC is mounted.
  • The connector KPPL accepts a programmer module plug, and the SLCC is covered by the keypad and cover of the module.

Application Data

Includes configurable hardware that must be set correctly for the application:

  • Berg-type hardware jumpers, identified by a JP nomenclature.
  • Wire jumpers, identified by a WJ nomenclature
  • These jumpers are utilized for user application options or factory testing. The majority of the jumper options are pre-set at the factory.


  • The LAN Control Processor (LCP) software contained in EPROMs U6 and U7 cannot be configured in the field.
  • The EPROMs U6 and U7 can be replaced and moved from one board to another. When ordering replacement boards. The EPROMs from the old board must be transferred to the new board.
  • When replacing an SLCC (or LCC) and the EPROMs are required, specify a SLCC to ensure that both EPROMs are included.
  • The use of software-implemented fault tolerance (SIFT) technology in the Mark V TMR control system. Based on separate inputs, each control processor in a TMR control panel determines its own control and protection functions. The control processors vote on the inputs used to make these decisions individually. If one control processor fails to correctly read an input, the erroneous value is out-voted.

Software Design

  • The exciter application program is made up of useful software modules that work together as "building blocks" to meet system demands. Variables are kept in random-access memory (RAM), whereas block definitions and configuration information are saved in read-only memory (ROM) (RAM).
  • The code is executed by microcontrollers. Traditional analog controls are simulated by the exciter application program. The program makes use of an open architecture system and a library of pre-existing building blocks.
  • Each block serves a specific purpose, such as signal level detectors, function generators, proportional integral (PI) regulators, AND gates, and function generators.

Time synchronization

  • Time synchronization allows for the accurate synchronization of all Mark V control panels on the Stagelink with a global time source (GTS), such as an IRIG-B time code signal or periodic pulse inputs. This enables the GTS to set the time clocks of all computers with operator interfaces.
  • The rest of the plant's equipment, including the DCSs, should be synchronized to this common GTS.

Power Requirements

  • The Mark V panel can accept power from a variety of sources. Before entering the Mark V panel, each power input source (dc and two alternating current sources) should be fed through its own external 30 A 2 pole thermal magnetic circuit breaker. A 125 V dc source and/or up to two 120/240 V ac sources can be used as power sources.
  • Each core in the panel has its own power supply board, which is powered by a 125 V dc panel distribution bus.

WOC is happy to assist you with any of your automation requirements. Please contact us by phone or email for pricing and availability on any parts and repairs.


What is DS215SLCCG1AZZ01B?
It is a LAN Communications Card developed by GE

What is the main microprocessor on the board?
The main microprocessor on the board is the LAN Control Processor (LCP), which is located on U1. The LCP communicates with the Drive Control Processor (DCP) on the Drive Control Card via 3PL and dual-ported RAM (U5).

What should be done when ordering replacement boards that require the EPROMs U6 and U7?
When ordering replacement boards that require the EPROMs U6 and U7, the EPROMs from the old board must be transferred to the new board.

What should be specified when replacing an SLCC (or LCC) and the EPROMs are required?
When replacing an SLCC (or LCC) and the EPROMs are required, a SLCC should be specified to ensure that both EPROMs are included.