Part Number: DS215SDCCG1AZZ01A
Manufacturer: General Electric
Series: Mark V
Product type: Drive Control Card
Microprocessors: 3 (16-bit microprocessors)
Interconnection: Coupled via dual-ported RAM (DPR)
Interface Circuitry: Connects with other boards for AC and DC motor drives
Function: Manages drive, motor signals, and customer I/O
Versatility: Also utilized for other functions in TC2000 applications
Country of Manufacture: United States (USA)
DS215SDCCG1AZZ01A is a drive control card developed by GE. It is a part of mark V control system. SDCC contains the primary control circuits and software for the drive. The board also includes general-purpose interface circuits that connect to other boards to form different types of ac and do motor drives. Drive and motor signals, as well as customer I/O, are controlled and processed by the interface circuits.
- The card houses three microprocessors: the Drive Control Processor (DCP) at U1, the Motor Control Processor (MCP) at U21, and the Comotor Processor (CMP) at U35. The card employs onboard software stored in Ive memory chips, which include four EPROMs (U11, U12, U22, and U23), which contain factory-programmed configuration data, and one EEPROM (U9), which contains field-adjustable parameters. These memory chips are housed in sockets.
- This card contains the primary control circuitry as well as the system software. Drive applications for AC2000, DC2000, and EX2000 series drives are among the applications for this card. The board includes three microprocessors and a dual-port RAM.
A drive control processor (DCP), a motor control processor (MCP), and a co-motor processor are all components of a microprocessor (CMP). The DCP handles peripheral functions as well as analog and digital I/O. This processor runs programs such as address decoders, wait-state generators, and interrupt controllers.
- The MCP is responsible for motor control as well as system I/O. If the MCP's processing power is insufficient to perform control algorithms, the CMP will take over. This processor has the additional processing power required to perform complex mathematical calculations. Storage is built into the five memory chips found on the drive. The fault code is displayed using a bank of ten on-board LEDs. Users will see codes in binary coded decimal (BCD) or binary form.
- The card includes Berg-type hardware jumpers, denoted by a JP nomenclature, as well as hard-wired jumpers, denoted by a WJ nomenclature.
- To function in the drive, the component must include the onboard software stored in EPROMs U11, U12, U22, and U23, as well as EEPROM U9.
- Transfer the onboard software from the old card to the new when replacing.
- Equipped with onboard testpoints designed for testing and troubleshooting needs.
- These testpoints consist of metal posts strategically positioned along specific signal paths.
- These signals can be conveniently measured or observed using tools such as an oscilloscope or other measurement instruments.
- 1PL - Power Supply/Interface Board: The 1PL interface represents the bidirectional input and output pathway between the Power Supply/Interface Board (IMCP, DCI, SDCI, or DCFB) and the SDCC. This connection channel ensures efficient data exchange, enabling vital instructions and information to flow between these critical components.
- 2PL - Power Supply/Interface Board to Voltage Inputs: The 2PL interface encompasses the transmission of ±5, 15, and 24 V dc inputs from the Power Supply/Interface Board. These voltage inputs are pivotal for powering and energizing the SDCC, ensuring its optimal operation within the system.
- 3PL - Outputs to LAN Communications Card: The 3PL interface delineates the path through which outputs are channeled to the LAN Communications Card. This link facilitates communication between the SDCC and the LAN, allowing seamless data exchange and control over the network.
- 6PL - Drive Terminal Board: The 6PL interface establishes communication between the Drive Terminal Board or Simple Drive Terminal Board and the SDCC. This bi-directional connection plays a pivotal role in coordinating and regulating the communication and control between these essential components.
- 7PL - Signal Processor Card: On configurations where applicable, the 7PL interface facilitates communication between the Signal Processor Card or Multibridge Signal Processing Card and the SDCC. This connection enables data transfer and coordination, enhancing the overall functionality of the system.
- 8PL - Drive Terminal Board to Communication: The 8PL interface mirrors the role of 6PL, connecting the Drive Terminal Board (531X305NTB) or Simple Drive Terminal Board to the SDCC. This redundant connection ensures reliability in communication and control across the system.
- 9PL - Unused: 9PL interface remains unused, highlighting the modular and adaptable nature of the SDCC interface design.
- 11PL - SDCC Outputs to Meters:11PL interface directs SDCC outputs to meters, providing an avenue for data visualization and measurement.
The SDCC features a prominent LED display, consisting of a bank of 10 diagnostic LEDs. This display serves the crucial function of showcasing fault codes in either BCD (binary coded decimal) or binary format, depending on the specific fault number detected. Here's how the LEDs operate when indicating faults:
- Faults 1 to 399: In this range, the LEDs exhibit a slow blink rate while displaying a BCD pattern. The left-most two LEDs encode the hundreds digit, the next four LEDs represent the tens digit, and the right-most LED signifies the units digit.
- Faults 400 to 1023: For faults falling within this range, a faster blink rate is employed, showcasing a binary pattern. The left-most LED corresponds to 29 (or 512), the second-most LED represents 28 (or 256), and so forth, following a binary progression.
- No Fault or Drive Not Running: In cases where there is no fault or the drive is not operational, the LEDs engage in sequential blinking, occurring two at a time. The sequence typically starts from the outermost positions, progressing inward toward the center, and then reverses direction.
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FREQUENTLY ASKED QUESTIONS
What is DS215SDCCG1AZZ01A?
It is a drive control card developed by GE.
What functions does the Co-motor Processor execute?
The CMP specializes in performing intricate mathematical operations required for advanced motor control algorithms that demand higher computational power.
Why is the Co-motor Processor (CMP) utilized selectively?
The CMP is activated only when the motor control algorithm complexity surpasses the MCP's capabilities, ensuring optimal utilization of resources while maintaining efficiency.
What advantages does the use of dual-ported RAM offer?
The dual-ported RAM allows both the microcontrollers to independently and simultaneously access the same memory arrays, enabling efficient data sharing and coordination between the MCP and CMP.
How does the watchdog timer in the MCP enhance reliability?
The watchdog timer in the MCP monitors the system's operation. If it detects a malfunction or lack of response, it triggers a corrective action to ensure the system remains functional and reliable.