IS220PVIBH1A, REV D - Vibration Monitor I/O Module

SPECIFICATIONS:

Part Number: IS220PVIBH1A, REV D
Manufacturer: General Electric
Series: Mark VIe
Product Type: Vibration Monitor I/O Module
Ethernet Ports: 2 × 10/100 Mbps RJ45
A/D Channels: 16
A/D Sampling Rate: 80 kHz
A/D Resolution: 14-bit
Output Connector: DC-37 pin
Relative humidity: 5% to 95%, no-condensing
Power Requirements +32 V dc to 18 V dc
Microprocessor: Freescale Power pc (Power QUICC II PRO 667 MHz)
Memory: 256 MB DDR SDRAM
Operating System: QNX Neutrino
Weight: 2 lbs
Availability: In Stock
Country of Manufacturer: United States (USA)
Manual: GEH-6721G

FUNCTIONAL DESCRIPTION:

IS220PVIBH1A, REV D is a Vibration Monitor I/O Module manufactured and designed by General Electric as part of the Mark VIe Series used in GE Distributed Turbine Control Systems. The Vibration Monitor (PVIB) pack functions as the electrical interface between one or two I/O Ethernet networks and the TVBA vibration terminal board. It consists of a common processor board used across all Mark VIe distributed I/O packs, along with a dedicated acquisition board and a daughterboard. Channels 1 through 8 support a range of sensor types, including Proximitors, Velomitors, seismic sensors, and integrated-output accelerometers (limited to Channels 1–3 for accelerometers). Channels 9 to 12 are compatible exclusively with Proximitors, while Channel 13 is configurable for either a Keyphasor signal or a proximity-type signal.

The PVIB pack includes dual RJ45 Ethernet ports and a 3-pin power input. It supports dual Ethernet networks for sampling rates below 100 Hz and single Ethernet networks for standard frame rates of 3.125, 6.25, 12.5, 25, 50, and 100 Hz. Data is transmitted via a DC-37 pin connector, which connects directly to the terminal board.

INSTALLATION:

• Securely install the appropriate terminal board in its designated location.

• For simplex configurations, plug one PVIB I/O pack directly into the terminal board. For TMR (Triple Modular Redundant) configurations, insert three PVIB I/O packs into the corresponding connectors on the terminal board.

• Fasten the I/O packs using the threaded studs located near the Ethernet ports. These studs slide into a mounting bracket designed specifically for the terminal board type.

• Adjust the mounting bracket to ensure no right-angle force is applied to the DC-37 pin connector between the I/O pack and the terminal board. This adjustment is typically a one-time procedure for the product's lifetime.

• Connect one or two Ethernet cables, based on the system setup. The PVIB pack functions through either port. In dual Ethernet configurations, it is standard practice to connect ENET1 to the network associated with the R controller.

• Apply power by plugging the power connector into the side of the PVIB pack. It is not necessary to de-energize the cable before insertion, as the pack includes a built-in soft-start feature that limits inrush current during power-up.

• Ensure that the TVBA’s N28 power supply daughterboard is properly seated in its designated connector on the TVBA terminal board.

OPERATION:

The processor application code includes all the logic required for the PVIB pack to function using either one or two Ethernet connections. When configured with dual Ethernet inputs, both network paths remain continuously active. In the event of a failure on one network, the I/O pack continues operating without interruption, and the issue is reported through the functioning network. This dual-active design offers greater fault tolerance compared to traditional hot-backup systems, where the secondary port only activates after a primary port failure is detected.

The processor's Ethernet ports support auto-negotiation between 10 Mbps and 100 Mbps speeds, and between half-duplex and full-duplex modes. An industry-standard infrared serial communication port is also built into the processor board and accessible from the front of the pack. This port allows access to diagnostic information and enables configuration or programming when Ethernet connectivity is unavailable. It is compatible with most notebook computers and handheld PDAs. The processor board used in the PVIB pack is the same across all Mark VIe Ethernet I/O packs and includes the following components:

• High-speed processor with RAM and flash memory.
• Two fully independent 10/100 Ethernet ports with connectors.
• Hardware watchdog timer and reset circuit.
• Internal I/O pack temperature sensor.
• Infrared serial communications port.
• Electronic ID and the ability to read IDs on other boards.
• Substantial programmable logic supporting the acquisition board.
• Input power connector with soft start/current limiter.
• Local power supplies, including sequencing and monitoring.

VIBRATION MONITORING HARDWARE:

The KAPA analog processing board is responsible for A/D (analog-to-digital) conversion, D/A (digital-to-analog) conversion, and digital pre-processing within the PVIB system. It features a 16-channel A/D block that samples input signals at 80 kHz using 14-bit resolution converters.

Digital pre-processing is performed by a field-programmable gate array (FPGA), which reads the A/D data, applies digital filtering to the sampled signals, and transfers the processed data to microprocessor memory. Additionally, the FPGA handles high-frequency signal processing for the tracking filter, as well as the 1x and 2x vibration calculations.

The tracking filter isolates the vibration components related to the turbine’s rotational speed. The 1x vibration measurement represents the peak-to-peak radial displacement synchronized with the shaft speed and includes phase information relative to the Keyphasor. The 2x calculation identifies the radial vibration component occurring at twice the shaft speed, providing insight into potential mechanical imbalances or issues.

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FREQUENTLY ASKED QUESTIONS:

What types of sensors are supported by the PVIB Module?

The PVIB supports Proximitors, Velomitors, seismic sensors, and accelerometers with integrated output (limited to Channels 1–3). Channels 9–12 support only Proximitors, while Channel 13 can be configured for either a Keyphasor or a proximity signal.

How does the PVIB handle Ethernet connectivity?

The PVIB has two RJ45 Ethernet ports and supports operation over either port. When both ports are connected, the system uses both paths actively for improved fault tolerance. The ports auto-negotiate between 10/100 Mbps and half/full duplex.

How is vibration data processed inside the PVIB?

An FPGA on the KAPA board performs digital filtering, tracking filter computations, and 1x/2x vibration analysis. It reads the 14-bit, 80 kHz A/D signals and processes them before sending the data to the processor.